Job description
SoCode are urgently recruiting for a Contract FPGA Engineer for our exclusive Telecoms Client based in Cambridge for an initial 6 month assignment starting in January 2018.
The role will involve writing Verilog to add features to and optimise our FPGA which is responsible for managing the layer 2 network traffic processing.
Major Responsibilities and Tasks:
- Fix bugs and write new features for the VectaStar product.
- Work with the rest of the Software team (other software engineers as well as DSP, FPGA, Radio and other specialists) to collaborate on development projects.
- Follow the processes of the team and company.
- A good degree in an applicable subject (Computer Science, etc) and 5 years’ relevant experience.
- Strong FPGA development skills (Verilog), preferably Xilinx
- Experience with git, or at least other version control tools
- Knowledge of network protocols, Layer 2, Ethernet, TCP / IP, ARP, UDP, ATM & E1
- Happy working with large, existing code bases rather than fresh-ground development
To apply please forward your CV to us as soon as possible and we will be in touch immediately with suitable candidates.