A leading semiconductor company in Cambridge, as part of their ongoing expansion, is looking to strengthen their front-end, digital design team, by recruiting a Principal SoC Design Engineer.

If you believe yourself to be self-motivated, hold a strong academic record with a sound understanding of SoC design principles, and ample experience in digital or mixed-signal SoC development then keep reading!

As the Principal SoC Design Engineer, you will be joining a privately owned and funded IC design house with a consistent record of financial growth and technical excellence. Delivering a completely digital, RF and mixed-signal ASIC from specification through to GDSII tape-out and production silicon. Working for a range of customers from start-ups to blue-chip companies, and project portfolios from module design to multi-million gate System-on-Chip.

Day to day responsibilities will include:

• Lead a digital team on SoC projects
• Write chip or block level micro-architecture specifications
• Working with external suppliers (foundries, IP vendors, EDA companies)
• RTL coding of modules, sub-system or full-chip (primarily Verilog or SystemVerilog)
• Selection and integration of 3rd party IP into SoC design
• Chip-level integration and liaising with implementation and physical design staff

Essential skill and experience needed:

• Degree qualified in Electronic Engineering or related discipline
• Extensive experience as a digital designer or digital lead
• A good understanding of the complete SoC flow from specification through to tape-out, validation, and test
• Good working knowledge of verification techniques and methodologies and proven ability to debug issues in a structured and timely way
• Low power design expertise

The following skills are advantageous but not essential:

• Experience of designing for automotive or safety-critical applications
• Good knowledge of DFT techniques and the impact on the RTL design
• VHDL coding knowledge
• Analog design knowledge or experience of working on mixed-signal SoC developments.
• Experience of FPGA design and associated tools

Location: Cambridge
Salary: Competitive
Benefits: Excellentworking environment, flexible working, matched contribution pension scheme, subsidised private healthcare scheme, life assurance, and share options scheme.

If you are interested in applying for this role, please email Shannen at shannen@socode.co.uk


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